Physics and Q(V) formalism
Most developedCharge-based nonlinear capacitor models, analytical harmonic estimates, and validation against real DC-bias curves from vendor data.
Flagship theory article for signal-integrity readers.Capacitor Research
HighSNR Lab focuses on real capacitor behavior in precision electronics: MLCC bias, charge nonlinearity, distortion, settling, measurement methods, and practical design rules.
Why MLCCs Matter
MLCCs are everywhere in modern electronics. They are small, inexpensive, reliable, and easy to use until their real behavior starts to matter.
A capacitor marked as 10 uF may deliver only a fraction of that value under DC bias. An X7R or X5R part placed in a filter, reference path, sensor front-end, or precision signal chain can change bandwidth, settling time, noise behavior, and even introduce measurable distortion. In many cases, the problem is not the capacitor itself, but the assumption that it behaves like an ideal linear component.
MLCC research is one of the long-running directions at HighSNR Lab. Our goal is to understand what actually happens inside ceramic capacitors and turn that understanding into practical models, measurement methods, and design rules.
We do not study MLCCs in order to avoid them. We study them because engineers use them everywhere. The practical goal is to know when these components are harmless, when they become a hidden error source, and how to reduce their impact on precision, spectral purity, settling behavior, and measurement reliability.
Current Focus
Voltage-dependent capacitance in X7R and X5R ceramics
Charge-conserving capacitor models that avoid simulation artifacts
Harmonic distortion in RC filters and precision signal paths
Dielectric history, bias memory, losses, and long-term behavior
Measurement methods and design rules for reducing MLCC-related errors
Research Program Plan
The active program remains one research area - real capacitor behavior - but it is now organized as a practical publication and measurement roadmap.
THD methodology for passive filters
Tool-backedSimulation methods for passive RC/filter networks with voltage-dependent Class II capacitors, supported by open engineering tools.
Practical article and reusable simulator workflow.Circuit-level distortion compensation
High noveltyAnti-parallel capacitor arrangements, bias-point selection, value splitting, and residual-distortion estimates for practical mitigation.
Application-oriented article for analog design engineers.Behavioral SPICE and system models
Vendor-facingLimits of C(Vdc)-interpolation models and a path toward charge-based Q(V) formulations for predicting distortion.
Targeted material for application engineers at component vendors.Measurement stand and experimental validation
In progressA dedicated measurement board, QA403-based THD workflow, NPR-style wideband tests, and temperature-dependent characterization.
Experimental validation articles planned for winter 2026/27.Publication Roadmap
Publish the Q(V) formalism and physical distortion mechanism as the flagship theory piece.
Turn the passive-filter simulator workflow into a practical engineering article.
Develop compensation methods for reducing MLCC distortion in real circuits.
Document the limits of common vendor SPICE models and propose charge-based improvements.
Build the measurement stand and validate theory with measured THD, NPR, bias, and temperature data.